Cmos Transistor Designs with Magic VLSI- Part 3: Nmos Load Common Source Amplifier

In this work i used width to length ratios as;

(W/L)1/(W/L)2=100

Layout of the design

Netlist;

* SPICE3 file created from hwk4.ext - technology: scmos

.model NMOS NMOS

M1000 Vdd Vdd output Gnd NMOS w=4 l=40

+ ad=28 pd=22 as=238 ps=96

M1001 output Input Gnd Gnd NMOS w=30 l=3

+ ad=0 pd=0 as=210 ps=74

C0 Gnd 0 5.1fF

C1 Input 0 6.4fF

C2 output 0 3.6fF

C3 Vdd 0 28.0fF

V1 Vdd 0 5

V2 Input 0 SINE(5mV 5mV 10000000 0 0 0 1000)

.tran 0.5us

.backanno

.end

Width-length ratios of transistors are;

Theoretical gain is; sqrt((W/L)1/(W/L)2)=10

Gain at the 50Hz;

Av=10

Gain at the 10MHz;

Av=4.4