After installation you are ready to design an IC as you wish. For an example there is a tutorial video that can be the best start;
For our first part project, we designed the layout of Nand gate;
After designing this layout, we produce netlist of this specific layout. For each different layout design, different netlist code produced by the MAGIC VLSI. Netlist codes defines connections between metals and defines parasitic capacitors depending on your design.
After completing transistor design, you need to follow these steps;
1_"save nandgate"
2_"extract all"
3_"ext2spice"
After all you produced netlist of your design as "nandgate.spice" and you can open it with "Notepad++". For final you we are suggested to use LTSpice. This program allows us to edit netlist document of MAGIC VLSI. Open LTSpice and follow these steps
1_Click File-new schematic
2_View-Spice Netlist
3_Right Click and Edit as Indp. Netlist
4_Give a name for LTSpice Netlist
5_Copy MAGIC VLSI netlist and paste LTSpice documents
6_Modify as shown below;
Change;
nfet to NMOS
pfet to PMOS
gnd to 0
gnd! to 0
and obtain netlist as;
* SPICE3 file created
from nandv2.ext - technology: scmos
.model NMOS NMOS
.model PMOS PMOS
M1000 Vout Va Vdd Vdd
PMOS w=12 l=2
+ ad=84 pd=38 as=120
ps=68
M1001 Vdd Vb Vout Vdd
PMOS w=12 l=2
+ ad=0 pd=0 as=0 ps=0
M1002 a_n4_n24# Va 0
0 NMOS w=6 l=2
+ ad=42 pd=26 as=36
ps=24
M1003 Vout Vb
a_n4_n24# 0 NMOS w=6 l=2
+ ad=30 pd=22 as=0
ps=0
C0 Vdd Va 2.6fF
C1 Vdd Vb 2.6fF
C2 0 0 7.9fF
C3 Vout 0 3.5fF
C4 Vb 0 8.7fF
C5 Va 0 7.3fF
*1 MHZ
V1 Va 0 PULSE(0 5 0 0 0 0.0000005 0.000001 100)
V2 Vb 0 PULSE(0 5 0 0 0 0.0000005 0.000001 100)
V3 Vdd 0 5 Rser=0
.tran 0.00001
.backanno
.end
And right click to the modified netlist and run, by adding trace you can observe your results.
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